We propose a burst optical packet generator based on a novel photonic parallel-to-serial conversion scheme, and demonstrate 40-Gbit/s 16-bit optical packet generation from 16-ch parallel low-voltage TTL data streams. It consists of electrical 4:1 parallel-to-serial converters that employ InP metal-semiconductor-metal photodetectors, and an optical time-domain multiplexer with electroabsorption modulators. The proposed optical packet generator is suitable for burst optical packet generation and overcomes the electronic bandwidth limitation, which is prerequisite for achieving high-speed photonic packet switched networks. In addition, it can be driven by simple low-cost low-power CMOS logic circuits, and is compact and extensible in terms of the number of input channels due to the effective combination of electrical and optical multiplexing.

A performance of the complex chaotic spreading sequences with constant power is investigated in a chip-synchronous complex CDMA with a complex scrambling. We estimate a signal-to-interference ratio (SIR) and a bit error rate (BER). An exact invariant measure of the complex chaotic spreading sequence can be obtained. Therefore, the SIR can be calculated analytically. The result can be used as one of the criteria for evaluating the performance of the complex CDMA using the chaotic spreading sequences.

In this report, we propose a high-performance pipelined VLSI architecture of the LMS adaptive filter derived by a cut-set retiming technique. The proposed architecture has a peculiar pipelined form with 3 adaptation delays, and the FIR filter portion has a peculiar class of the transposed form providing a minimum output latency and coefficient delay. Both the delays, the adaptation delay and coefficient delay, are compensated by a look-ahead conversion. A new high-speed 4-input and 2-output CSA type adder with a small hardware is employed. The proposed architecture can achieve a good convergence property, high-sampling rate, minimum output latency, small hardware, and lower power dissipation, simultaneously, and is very suitable to implement on the VLSI.

We present an 88 wavelength-routing switch (WRS) that monolithically integrates tunable wavelength converters (TWCs) and an 88 arrayed-waveguide grating. The TWC consists of a double-ring-resonator tunable laser (DRR TL) allowing rapid and stable switching and a semiconductor-optical-amplifier-based optical gate. Two different types of dry-etched mirrors form the laser cavity of the DRR TL, which enable integration of the optical components of the WRS on a single chip. The monolithic WRS performed 18 high-speed wavelength routing of a non-return-to-zero signal at 10 Gbit/s. The switching operation was demonstrated by simultaneously using two adjacent TWCs.